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Implement SIMD (SSE, NEON, AVX) #31

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opened 2024-06-07 00:38:21 -04:00 by josh · 2 comments
josh commented 2024-06-07 00:38:21 -04:00
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Implement parallelized vector instructions by inlining assembly. The issue is there are several SIMD (Single instruction, multiple data) instruction sets depending on the platform, as follows:

  • x86 - SSE2, SSE3, SSSE3 and SSE4. AVX, and AVX-512
  • ARM - NEON
  • RISC-V - TVM (This is some crazy stuff)
Implement parallelized vector instructions by inlining assembly. The issue is there are several SIMD (Single instruction, multiple data) instruction sets depending on the platform, as follows: * x86 - SSE2, SSE3, SSSE3 and SSE4. AVX, and AVX-512 * ARM - NEON * RISC-V - TVM (This is some crazy stuff)
josh self-assigned this 2024-06-24 19:27:18 -04:00
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maxine commented 2024-08-07 19:49:54 -04:00
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I don't think we've began fucking with this yet

I don't think we've began fucking with this yet
josh commented 2025-03-11 03:56:34 -04:00
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SIMD is coming to the standard library in C++26. Additionally, I may be able to use it via std::experimental.
Here are some more resources for later study:

http://const.me/articles/simd/simd.pdf
https://en.cppreference.com/w/cpp/numeric/simd
https://users.ece.cmu.edu/~franzf/teaching/slides-18-645-simd.pdf
https://en.cppreference.com/w/cpp/experimental/simd

SIMD is coming to the standard library in C++26. Additionally, I may be able to use it via std::experimental. Here are some more resources for later study: http://const.me/articles/simd/simd.pdf https://en.cppreference.com/w/cpp/numeric/simd https://users.ece.cmu.edu/~franzf/teaching/slides-18-645-simd.pdf https://en.cppreference.com/w/cpp/experimental/simd
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Reference: josh/j3ml#31
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